Flash Memories (Hardcover)

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A complete memory product and system optimization analysis is provided in-depth for NAND flash based solid-state storage systemsA Performance Indicator Methodology is developed to support a requirement based application shown for the specific example of a flash memory development processA higher abstraction level is introduced to guide engineering teams responsible to develop system solutions to overcome the complexity of weaknesses of flash memoriesDescribes cost and performance issues and thus the road commercial success of Memory IC Design

The subject of this book is to introduce a model-based quantitative performance indicator methodology applicable for performance, cost and reliability optimization of non-volatile memories. The complex example of flash memories is used to introduce and apply the methodology. It has been developed by the author based on an industrial 2-bit to 4-bit per cell flash development project. For the first time, design and cost aspects of 3D integration of flash memory are treated in this book. Cell, array, performance and reliability effects of flash memories are introduced and analyzed. Key performance parameters are derived to handle the flash complexity. A performance and array memory model is developed and a set of performance indicators characterizing architecture, cost and durability is defined.   Flash memories are selected to apply the Performance Indicator Methodology to quantify design and technology innovation. A graphical representation based on trend lines is introduced to support a requirement based product development process. The Performance Indicator methodology is applied to demonstrate the importance of hidden memory parameters for a successful product and system development roadmap.  Flash Memories offers an opportunity to enhance your understanding of product development key topics such as: ·        Reliability optimization of flash memories is all about threshold voltage margin understanding and definition; ·        Product performance parameter are analyzed in-depth in all aspects in relation to the threshold voltage operation window; ·        Technical characteristics are translated into quantitative performance indicators; ·        Performance indicators are applied to identify and quantify product and technology innovation within adjacent areas to fulfill the application requirements with an overall cost optimized solution;  ·        Cost, density, performance and durability values are combined into a common factor ¿ performance indicator - which fulfills the application requirements

Detlev Richter is Business Area Manager at TÜV SÜD Automotive GmbH in Garching, Germany responsible for powertrain technologies. Before he led the electronic development for power inverters at Semikron GmbH & Co. KG in Nuremberg. Before he was Director at Qimonda Flash GmbH, where he led the Product Innovation for flash memoires based on multi-bit charge trapping and multi-level floating gate flash cells. Before he was Director at Infineon Technologies AG, where he led the Product Engineering and Test activities for flash memories, ASIC's, SOC with embedded DRAM and speciality DRAM. His research interests include "fault analysis of memories based on defect injection and simulation", "Innovative cell and sense concepts for non-volatile memories" and "Enhancement of MLC Flash using improved ECC techniques".Before he was product engineer responsible for process integration and optimization for bipolar power technologies at BOSCH in Reutlingen. He studied Electrical Engineering at TU Sofia and TU Dresden and has the Dipl.-Ing. Degree from the Technical University of Dresden.

Detlev Richter is Business Area Manager at TÜV SÜD Automotive GmbH in Garching, Germany responsible for powertrain technologies. Before he led the electronic development for power inverters at Semikron GmbH & Co. KG in Nuremberg.

Before he was Director at Qimonda Flash GmbH, where he led the Product Innovation for flash memoires based on multi-bit charge trapping and multi-level floating gate flash cells. Before he was Director at Infineon Technologies AG, where he led the Product Engineering and Test activities for flash memories, ASIC’s, SOC with embedded DRAM and speciality DRAM. His research interests include “fault analysis of memories based on defect injection and simulation”, “Innovative cell and sense concepts for non-volatile memories” and “Enhancement of MLC Flash using improved ECC techniques”.

Before he was product engineer responsible for process integration and optimization for bipolar power technologies at BOSCH in Reutlingen.

He studied Electrical Engineering at TU Sofia and TU Dresden and has the Dipl.-Ing. Degree from the Technical University of Dresden.